nelsoncsc / verilaxi Star 17 Code Issues Pull requests SystemVerilog AXI verification library and video-DMA IP: AXI4/Lite/Stream BFMs, triple-buffer VDMA, and multi-tap temporal VDMA with byte-exact real-image round-trip tests. Verilator · Yosys · Docker · CI. docker verification image-processing video-processing systemverilog fifo cdc yosys dma bfm verilator sva cdma axi4 axi4-lite axi4-stream github-actions vdma skidbuffer data-movement Updated Jun 28, 2026 SystemVerilog
amamory / axis-skidbuffer Star 4 Code Issues Pull requests A one-position buffer compatible with AXI Stream interface vivado axi-stream skidbuffer Updated May 23, 2023 Tcl
amamory / axis-skidbuffer-lfsr Star 3 Code Issues Pull requests An IP used for testing AXI stream protocols. It uses a LFSR to generate ready and valid signals vivado lfsr axi-stream skidbuffer Updated Aug 10, 2020 Tcl
amamory / skidbuffer-testing Star 2 Code Issues Pull requests vivado design to test the skidbuffer IP vivado axi-stream skidbuffer Updated Aug 10, 2020 Tcl
mnemocron / axis-skidbuffer Star 1 Code Issues Pull requests A one-position buffer compatible with AXI Stream interface vhdl axis axi-stream skidbuffer Updated Jan 17, 2024 VHDL