Name		Name	Last commit message	Last commit date
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.github/workflows		.github/workflows
docs		docs
packages		packages
.envrc		.envrc
.gitignore		.gitignore
LICENSE		LICENSE
README.md		README.md
flake.lock		flake.lock
flake.nix		flake.nix
pubspec.lock		pubspec.lock
pubspec.lock.json		pubspec.lock.json
pubspec.yaml		pubspec.yaml
treefmt.nix		treefmt.nix

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River

River is an open source & modular RISC-V based CPU & SoC.

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Modular RISC-V implementation & SoC

midstall.com/products/river/

emulator simulator assembler risc-v rohd

LGPL-2.1 license

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